Green IT

Challenges of Green IT

Due to the rising energy demands and the growing greenhouse gas emissions, energy efficiency is becoming one of the most important challenges in designing and managing computer systems and the corresponding infrastructures. The energy costs of a single data centre in UK will more than double to about £7.4 million a year by 2010. In USA, the national energy consumption of servers and data centers could reach 100 billion kWh, representing a $7.4 billion annual electricity cost by 2011. On the other hand, it indicates that the resource utilization ratios of IT systems in large enterprises are only around 35%. In some enterprises, this is only at 15%. Google reported that servers are rarely completely idle and seldom operate near their maximum utilization, instead operating most of the time at between 10 and 50 percent of their maximum utilization levels. Therefore, the conflict between the increasing energy consumption and low resource utilization presents challenges and opportunities for the IT systems.

Power Management

Power reduction techniques can be categorized as Static Power Management (SPM) and Dynamic Power Management (DPM). SPM techniques are applied at design time. For example, the programs can be compiled for low power. On the contrary, DPM is employed to reduce power consumption by dynamically reconfiguring the electronic components to provide the required performance levels with a minimum number of active components or a minimum workload on the components. Two premises have to be satisfied for using DPM. First, the systems or the corresponding components must experience non-uniform workloads during operation time. The second, It is possible to predict the bursts of the workloads.

Power State

The major components consuming energy within a typical sever are processors, memory, disk drives, etc. The components can work at different power states when serving different workloads. For example, a processor could have three power states, namely active, idle, and sleep. The processor only works in active state where all the components are functional. When an interrupt is served, and there is no succeeding interrupt, the processor is transferred to the idle state which allows a software application to stop the processor temporarily while continuing to monitor interrupts. When a new interrupt arrives, the processor will be transferred to the active state quickly. The processor can be transferred to the sleep state if there are no interrupts for a long period. The processor will be transferred back to the active state from idle state when a new interrupt arrives. The sleep state offers the biggest energy savings and consequently the lowest level of available functionality.

Processors in sleep state use considerably less energy than the processors in active state. However, transition from idle state to active state can incur a significant energy and time penalty because the chip has to go through a complex wake-up sequence before it can resume normal activity. To justify this penalty, the energy saved by putting the processor in sleep state has to be greater than the energy needed to activate it again, and the processor has to stay in the low power state for a sufficiently long period to compensate the energy overhead. The same problems apply to memory and disk drives.

Dynamic Voltage Scaling

Dynamic Voltage Scaling (DVS) is a traditional method for energy reduction of integrated circuits where there is a linear/pseudo-linear connection between energy and supply voltage. DVS can provide significant energy saving for moderately intensive workloads, but not the heavy workloads (e.g. server systems with many concurrent tasks). Therefore, DVS reduces energy consumption by varying the frequency and voltage in terms of different workloads. The DVS method can be applied to processor and memory. The power consumption of processor depends on the processor voltage and frequency as well as processor utilization.

References

  1. Luca Benini, Alessandro Bogliolo, Giovanni De Micheli. A Survey of Design Techniques for System-Level Dynamic Power Management. IEEE Transactions on VLSI Systems.Vol.8,No.3,2000, pp.299-316
  2. J.S.Chase, D.C.Anderson, P.N.Thakar, A.M.Vahdat and R.P.Doyle. Managing Energy and Server Resources in Hosting Centers. Proceeding of Eighteenth ACM Symp. On Operating systems principles, 2001, pp 103-116.
  3. E. N. Elnozahy, M.Kistle, and R. Rajamony. Energy-Efficient Server Clusters. Proceedings of Second Workshop on Power Aware Computing Systems, 2002.
  4. S. Gurumurthi, A. Sivasubramaniam, M. Kandemir, H. Franke, Reducing disk energy consumption in servers with DRPM. Computer. Vol. 36, No.12, 2003, pp.59-66.
  5. Luiz André Barroso and Urs Hölzle. The Case for Energy-Proportional Computing. Computer, Vol.40, No.12, 2007, pp.33-37.

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Topic revision: r2 - 09 May 2008 - 13:36:53 - TWikiAdminUser
 
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